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Diffusion capacitance of the p-n diode with short base is defined by the
A. Minority carriers life time in the base B. Majority carriers life time in the base C. Minority carriers transit time over the base D. Majority carriers transit time over the base E. Maxwell relaxation time 15. There is double heterojunction luminescent AlGaAs - GaAs - AlGaAs structure. Refraction index of GaAs is higher than refraction index of AlGaAs. What is the role of intermediate GaAs microsize layer for radiation? A. Majority carriers B. Ohmic contact C. Reduction of radiation D. Waveguide E. Observation of radiation. 16. Which is the key advantage of double heterojunction luminescent structure towards single heterojunction luminescent structure? A. Operated at higher bias voltage B. Is easier realized technologically C. Provides high radiation losses D. Provides high intensity of radiation by double injection E. Provides chaos observation of radiation 17. Define in which state 6 bit Johnson’s counter will be, after the 10th pulse is supplied to the clock input. Initial state is 000111. A. 011110 B. 011111 C. 111111 D. 111101 E. The correct answer is missing 18. A fragment of Verilog description is presented below. What value will Y variable take after execution of the fragment? reg A; reg [1: 0] B, C; reg [2: 0] D; reg [15: 0] Y; A=1’b1; B=2’b01; C=2’b10; D=3’b110; Y={2{A}, 3{B], C, 2{D}};
A. Y = 10’b 1100_1100_0111_1001 B. Y = 10’b 1000_1111_1010_0101 C. Y = 10’b 1101_0101_1011_0110 D. Y = 10’b 1100_0100_0111_1001 E. The correct answer is missing 19. In what sequence do the effects of design solutions increase on the final quality of the design a) conceptual, b) structural and c) parametrical synthesis steps? A. a - b - c B. c - b - a C. b - c - a D. b - a - c E. c- a - b 20. Let Q be the number of integers from the segment [1, 2,..., 2010] that are divisible by 2 and 3 but not by 5. Find the number closest to Q. A. 150 B. 200 C. 250 D. 300 E. 350 21. What is the value of amplification gain of this amplifier? A. KU=10 B. KU=1 C. KU=11 D. KU=-1 E. KU=2 22. How will the change of R1 and R2 affect output voltage value? A. R1 decrease will lead to Uout decrease B. R1 decrease will lead to Uout increase C. R2 increase will lead to Uout increase D. The change of R1 and R2 will not affect Uout E. A. B. answers are correct 23. What is the reason of differential amplifier’s debalance? A. Non similarity of diffpair (transistor) B. Accuracy of current source C. Low gain D. High gain E. The value of phase shift 24. Complementary MOSFET is characterized by: A. The presence of only p-type channel B. The presence of only n-type channel C. The presence of p- and n-type channels D. The absence of n-type channel E. The absence of p-type channel 25. The following examples are expected to be models of logical shifter (written in Verilog HDL). Which of these examples will behave as pure combinational logic? 1) wire [7: 0] my_signal; assign my_signal = my_signal < < 1; 2) reg [7: 0] my_signal; always @ (*) begin my_signal = my_signal < < 1; end 3) reg [7: 0] my_signal; always @ (posedge clock) begin my_signal < = my_signal < < 1; end
A. Only example 1) is the correct one. B. Only example 2) is the correct one. C. Only example 3) is the correct one. D. Only examples 1) and 2) are the correct ones. E. All examples are correct. 26. After performing the code below, what will be displayed on the screen? #include < iostream> struct A { virtual void f(int x = 0) { std:: cout < < " A: " < < x < < std:: endl; } }; struct B: public A { virtual void f(int x = 1) { std:: cout < < " B: " < < x < < std:: endl; } }; int main() { A* p = new B(); p-> f(); return 0; } A. A 0 B. A 1 C. B 0 D. B 1 E. The correct answer is missing 27. After performing the code below, what will be displayed on the screen? #include < iostream> void f(int& x) { x += 3; std:: cout < < x < < std:: endl; } int main() { f(0); return 0; } A. 0 B. 3 C. The program contains run-time error D. The program contains compile-time error E. The correct answer is missing 28. Can the overloaded operator of the class be declared virtual? A. Yes B. No C. Only ++ and – operators D. Only if the class contains virtual destructor E. The correct answer is missing 29. After performing the code below, what will be displayed on the screen? #include < iostream> #include < typeinfo> struct A {}; struct B: public A {}; int main() { A* p = new B(); std:: cout < < typeid(p).name() < < std:: endl; return 0; } A. Struct A* B. Struct B* C. The program contains compile-time error D. The program contains run-time error E. The correct answer is missing 30. What design pattern is presented below? #include < iostream> struct A { virtual void f() { func(); } virtual void func() = 0; }; struct B: public A { virtual void func() {} }; A. Virtual constructor B. Strategy C. The program contains compile-time error D. Template method E. The correct answer is missing Answer Sheet
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